Recently, a parallel processing device has been utilized in which calculation units are coupled to each other and cooperate to make calculations. In the parallel processing device, when a baseboard management controller (BMC) that controls a power source in a calculation unit starts the calculation unit, a program called a power on self-test (POST) that performs initialization and diagnosis of hardware is executed on a central processing unit (CPU). After that, an operating system (OS) is started, and the calculation unit may perform various calculations.
The POST executes diagnosis processing in order to check whether pieces of hardware such as the CPU and a main storage device included in the calculation unit are in proper use. When a failure of hardware has been detected in the diagnosis processing, the POST notifies the BMC of a failure result.
There is a technology in which a time taken for self-diagnosis at the normal operation of a printing device is reduced by storing information indicating that a serious issue has occurred in the printing device, and performing detailed self-diagnosis in the printing device as compared with the self-diagnosis at the time of normal power-on when the power is turned on after the serious issue has occurred (for example, Japanese Laid-open Patent Publication No. 10-35061).
There is a technology by which a test is conducted in order from a test item in which a failure location is highly probably detected, and a failure detection time is reduced by storing data in which a self-diagnostic result of a test object and order of test items are associated with each other and rearranging the test items depending on the self-diagnostic result (for example, Japanese Laid-open Patent Publication No. 2001-201527).
There is a technology by which the reliability of an inspection device is maintained by allowing the setting of a content of self-diagnosis of an inspection circuit that inspects an inspection target device to be changed by a content in which an inspection is not allowed (for example, Japanese Laid-open Patent Publication No. 2009-139313).
In the diagnosis by the POST, it is desirable to execute diagnosis processing in further detail in order to reliably detect a failure, but it takes a longer time as the diagnosis processing is executed in further detail, and the time at which the calculation is started by the calculation unit is delayed. In the related art, the detail level of the diagnosis by the POST has been statically determined depending on a configuration of hardware, so that a problem occurs in which a specific time is taken for the diagnosis. In view of the above-described problem, it is desirable that a diagnosis time is reduced.